View SC2616_318357.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

Complete DDR Power Solution
POWER MANAGEMENT Description
The SC2616 is a fully integrated DDR power solution providing power for the VDDQ and the VTT rails. The SC2616 also completely adheres to the ACPI sleep state power requirements. A synchronous buck controller provides the high current of the VDDQ at high efficiency, while a linear sink/source regulator provides the termination voltage with 2 Amp Source/Sink capability. This approach makes the best trade-off between cost and performance. Additional logic and UVLOs complete the functionality of this single chip DDR power solution in compliance with S3 and S5 motherboard signals. The SC2616 is capable of sourcing up to 20A at the switcher output, and 2A source/sink at the VTT output. The MLP package provides excellent thermal impedance while keeping small footprint. VDDQ current limit as well as 3 independent thermal shutdown circuits assure safe operation under all fault conditions.
SC2616
Features
High efficiency (90%) switcher for VDDQ supplies 20 Amps High current gate drives Single chip solution complies fully with ACPI power sequencing specifications Internal S3 state LDO supplies high standby
VDDQ current (0.65Amp Min.)
ACPI sleep state controlled 2 Amp VTT source/sink capability UVLO on 5V and 12V Independent thermal shutdown for VDDQ and VTT Fast transient response 18 pin MLP package
Applications
Power solution for DDR memory per ACPI motherboard specification High speed data line termination Memory cards
Typical Application Circuit
5V 12V 10uF 5V STBY 0.1uF Suspend to RAM Suspend to disk S3 S5 16 4 11 10 18 17 0.1uF 12 3 2 0.1uF Cin 10k 10k U4 SC2616
12VCC 5VSBY SLP_S3 SLP_S5 SS/EN COMP HSINKPAD AGND LGND VTTSNS 5VCC TG BG PGND VDDQSTBY VDDQIN FB VTT VTT
1uF
9 15 14 13 7 8 1 6 5 0.1uF VTT
L 0.1uF Cout
VDDQ
19
Revision 3, March 2003
1
www.semtech.com
SC2616
POWER MANAGEMENT Dual 5V Typical Application Schematic
5V Cin 5VSTBY
5V
Ins tantly Available ACPI Controller
(SC1549)
5V Dual 0.1uF
12V 1uF 5V STBY 0.1uF Suspend to RAM Suspend to disk S3 S5 10k 10k 16 4 11 10 18 17 0.1uF 12 3 2 U4 SC2616
12VCC 5VSBY SLP_S3 SLP_S5 SS/EN COMP HSINKPAD AGND LGND VTTSNS
Cin
1uF
5VCC TG BG PGND VDDQSTBY VDDQIN FB VTT VTT
9 15 14 13 7 8 1 6 5 2 AMP 0.1uF
L 0.1uF
VDDQ Cout
VTT
Figure 1: ACPI controller supplies "always on" 5V supply, eliminating the need for back to back MOSFETs. (see applications section)
19
2003 Semtech Corp.
2
www.semtech.com
SC2616
POWER MANAGEMENT Absolute Maximum Ratings
Exceeding the specifications below may result in permanent damage to the device, or device malfunction. Operation outside of the parameters specified in the Electrical Characteristics section is not implied.
Parameter Supply Voltage, 5VCC to AGND Supply Voltage, 12VCC to AGND Standby Input Voltage Inputs AGND to PGND or LGND VTT Output Current Operating Ambient Temperature Range Operating Junction Temperature Thermal Resistance Junction to Ambient * Thermal Resistance Junction to Case * Storage Temperature Lead Temperature (Soldering) 10seconds TG/BG DC Voltage TG/BG AC Voltage ESD Rating (Human Body Model)
Symbol V 5V C C V 12V C C V 5V S B Y I/O
Maximum 7 15 7 5VSTBY +0.3, AGND -0.3 0.3
Units V V V V V A C C C/W C/W C C V V kV
IO(VTT) TA TJ JA JC TSTG TLEAD
2 0 to 70 125 25 4 -65 to 150 300 12Vcc + 0.3, AGND -0.5 12Vcc + 1.0, AGND -1.0
ESD
2
Electrical Characteristics
Unless specified: TA = 25C, 12VCC = 12V, 5VCC = 5V, 5VSBY = 5V.
* See Mounting Considerations.
Symbol V 5V C C V 12V C C V 5V S B Y IQ(5VSBY) S 0, S 5 S3 Conditions Min 4.5 10.8 4.5 Typ 5 12 5 1.8 3.5 TTL UVLO12VCC UVLO5VCC VREF IFB VEN(TH) TJ-SHDN TJ-HYST
3
Parameter 5V Supply Voltage 12V Supply Voltage 5V Standby Voltage Quiescent Current S3/S5 Threshold 12VCC Under Voltage Lockout 5VCC Under Voltage Lockout Feedback Reference Feedback Current SS/EN Shutdown Threshold Thermal Shutdown Thermal Shutdown Hysteresis
2003 Semtech Corp.
Max 5.5 13.2 5.5 2.5 5.0
Units V V V mA V
7 3.5
8.2 3.7 1.25
10 4
V V V
VFB = 1.25V 0.3 150 10
2
A V C C
www.semtech.com
SC2616
POWER MANAGEMENT Electrical Characteristics (Cont.)
Unless specified: TA = 25C, 12VCC = 12V, 5VCC = 5V, 5VSBY = 5V.
Parameter Sw itcher Load Regulation Oscillator Frequency Soft Start Current Duty Cycle Overcurrent Trip Voltage Top Gate Rise Time Top Gate Fall Time Bottom Gate Rise Time Bottom Gate Fall Time Dead Time Error Amplifier Transconductance Error Amplifier Gain @ DC Error Amplifier Bandwidth Error Amplifier Source/Sink Current Modulator Gain Power Good Low Power Good High Leakage S TB Y LD O Output Current Load Regulation Current Limit V TT LD O Output Voltage Source and Sink Currents Load Regulation Error Amplifier Gain Current Limit
Symbol
Conditions
Min
Typ
Max
Units
IVDDQ = 0A to 10A; S0; Fig 2: fOSC ISS 0 VTRIP TGR TGF BGR BGF td gm A EA GBW RCOMP = open % of VDDQ Setpoint Gate capacitance = 4000pF Gate capacitance = 4000pF Gate capacitance = 4000pF Gate capacitance = 4000pF 20 50 225
0.2 250 25 80 60 25 25 35 35 50 0.8 38 5 60 70 275
% KHz A % % nS nS nS nS nS mS dB MHz A dB 400 2 mV A
AM
VIN = 5V IPWRGD = 1mA, sink VPWRGD = 5V; S0
19 50 0.1
IVDDQSTBY V/I ILIM
DC current IVDDQ = 0A to 750mA; S3; Fig1: S3 = 0, VTT floating
750 0.5 1
mA % A
VTT IVTT VTT/ I AEA_VTT VTTILIM
VVDDQSTBY = 2.500V
1.235 1.8
1.250
1.265
V A
IVTT =+1.8A to -1.8A 75 S3 = high 3
1
% dB A
2003 Semtech Corp.
4
www.semtech.com
SC2616
POWER MANAGEMENT Pin Configuration
TOP VIEW
FB VTTSNS LGND 5VSBY VTT VTT VDDQSTBY VDDQIN 5VCC 1 2 3 4 5 6 7 8 9 18 17 16 15 14 13 12 11 10 SS/EN COMP 12VCC TG BG PGND AGND SLP_S3 SLP_S5
Ordering Information
Part Numbers SC2616MLTR(1) P ackag e MLP-18
Note: (1) Only available in tape and reel packaging. A reel contains 3000 devices.
(18 Pin MLP) Note: Pin 19 is the thermal Pad on the bottom of the device
Pin Descriptions
Pin # 1 2 3 4 5, 6 7 Pin Name FB VTTSNS LGND 5V S B Y VTT Pin Function Feedback for the STBY LDO and the switcher for VDDQ. VTT LDO feedback and remote sense input. VTT return. Connect to point of load return. The trace connecting to this pin must be able to carry 2 Amps. Bias supply for the chip. Connect to 5V standby. VTT return. Connect to point of load return. The trace connecting to this pin must be able to carry 2 Amps.
VDDQSTBY S3 VDDQ output. Provision must be made to prevent the VDDQSTBY supply from back feeding the input supply (see typical application schematic). Traces connecting to this pin must be capable of carring 1 Amp. VDDQIN 5V C C S LP _S 5 S LP _S 3 AGND PGND BG TG 12V C C COMP SS/EN TH_PAD VDDQ power input to VTT LDO. The trace connecting to this pin must be able to carry 2 Amps. Supply to the lower gate drive. Connect to S5 signal from motherboard. Connect to S3 signal from motherboard. Analog ground. Gate drive return. Keep this pin close to bottom FET source. Bottom gate drive. Top gate drive. Supply to the upper and lower gate drives. Compensation pin for the PWM transconductance amplifier. Soft start capacitor to GND. Pull low to less than 0.3V to disable controller. Copper pad on bottom of chip used for heatsinking. This pin is internally connected to AGND.
5 www.semtech.com
8 9 10 11 12 13 14 15 16 17 18 19
2003 Semtech Corp.
SC2616
POWER MANAGEMENT Timing Diagram
5V, 12V Rails S3 S5 1.25V 1.0V 0.3V SS/EN PGOOD TG BG STBY VDDQ VTT Vssqsb Vddqsw VDDQ
S0
S3
S0
S5
S0
Block Diagram
2003 Semtech Corp.
6
www.semtech.com
SC2616
POWER MANAGEMENT Typical Characteristics
40 35 80% 30 Gain (dB) 25 20 15 10 5 0 1E+3 0% 10E+3 Frequency (Hz) 100E+3 1E+6 1.2 1.3 1.4 VCOMP (V) 1.5 1.6 1.7 DUTY CYCLE (%) 0.0 2.0 4.0 6.0 Io (A) 8.0 10.0 12.0 -2.0 -1.5 -1.0 -0.5 0.0 Io (A) 0.5 1.0 1.5 2.0 2.5 60% 100%
40%
20%
Switching Section Error Amplifier Gain
VCOMP vs Duty Cycle
0.0%
Vo Error (%) VTT Error (%)
-0.1%
-0.2%
VDDQ Load Regulation
1.0%
0.5%
0.0%
-0.5%
-1.0% -2.5
VTT Load Regulation, Source and Sink
2003 Semtech Corp. 7 www.semtech.com
SC2616
POWER MANAGEMENT Evaluation Board Schematic
J1 12V C14 100uF J2 GND J5 5V STBY
+12V C15 0.1uF J3 5V 1500uF 1500uF 1500uF 1500uF 1500uF C1 C4 C16 10uF R12 10k R13 10k J4 GND C2 C5 C3 1uF Q2 R9 10k R3 2.2 L1 U4 SC2616 16 12VCC 5VSBY SLP_S3 SLP_S5 SS/EN COMP HSINKPAD AGND LGND VTTSNS 5VCC TG BG PGND VDDQSTBY VDDQIN FB VTT VTT 9 15 14 13 7 8 1 6 5 VTT C17 C13 0.1uF 330uF J13 VTT R7 10.0k/1% J15 J18 GND R10 R5 10.0k/1% R11 2.2 J8 J9 VDDQ J10 Q3 2.8uH 1500uF 1500uF 1500uF VDDQ C7 C9 C6 C8 0.1uF R4 2.2 Q1 C18 5V
Place Jumper JP2 to have Silver Box on at all times
*
SOURCE TO SOURCE CONFIGURATION
*
J6 GND
*
J7 BF_CUT/S3 J11 PWR GD/S5 J12 SS/EN R6 33K
5VSBY 4 11 10 18 17 12 3 2 C11 0.1uF TBD C12 1nF
C10
J14 GND
19
*
*
Q4 2N2222
J16 GND J17
J20 PWR_OK 5VSBY +12V 5V 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
R8 10k JP2
20K
1 2
MAN PS_ON
J19
3.3V 3.3V COM 5V COM 5V COM PWR_OK 5VSB 12V 3.3V -12V COM PS_ON COM COM COM -5V 5V 5V ATX M/B MOLEX 39-29-9202
Figure 2
2003 Semtech Corp.
8
www.semtech.com
SC2616
POWER MANAGEMENT Evaluation Board Bill of Materials
Item 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 Quantity 8 1 5 1 1 1 1 1 19 1 1 3 1 3 2 1 4 1 1 Reference C1,C2,C4,C5,C6,C7,C8,C18 C3 C9,C11,C15,C16,C17 C 10 C 12 C 13 C 14 JP 2 J1,J2,J3,J4,J5,J6,J7,J8,J9,J10,J11, J12,J13,J14,J15,J16,J17,J18,J20 J1 9 L1 Q1,Q2,Q3 Q4 R3,R4,R11 R5,R7 R6 R8,R9,R12,R13 R10 U4 Part 1500uF 1uF 0.1uF TBD 1nf 330uF 100uF MAN PS_ON E D 5052 ATX M/B 2.8uH F D B 7030B L 2N2222 2.2 10.0k, 1% 33k 10k 20k S C 2616 MOLEX P/N: 39-29-9202 FALCO P/N: T50168 (www.falco.com) Fairchild P/N: FDB7030BL any any any any any any Semtech any any Manufacturer Sanyo MX_CX any any
2003 Semtech Corp.
9
www.semtech.com
SC2616
POWER MANAGEMENT Typical Characteristics (Cont.)
Figure 3: S3 to S0 state transition with 600mA load on VDDQ Ch1: TG drive, Ch2: VDDQ w/2.5V offset, Ch3, S3, Ch4: SS/EN Note: VDDQ changes 16mV between S0 and S3 states (see cursor).
Figure 4: S3 to S0 state transition with 800mA load on VDDQ Ch1: TG drive, Ch12 VDDQ w/2.5V offset, Ch3, S3, Ch4: SS/EN Note: VDDQ changes 22mV between S0 and S3 states (see cursor).
2003 Semtech Corp. 10 www.semtech.com
SC2616
POWER MANAGEMENT Applications Information
Description The Semtech SC2616 DDR power supply controller is the latest and most complete switching and linear regulator combination, providing the necessary functions to comply with S3 and S5 sleep state signals generated by the Desktop Computer Motherboards. VDDQ supply, and VTT termination voltage are supplied to the Memory bus during S0 (normal operation) state. During S0, VDDQ is supplied via the Switching regulator, sourcing high output currents to the VDD bus as well as supplying the termination supply current. The SC2616 is capable of driving a 4000pf capacitor in 25ns (typical, top gate). This drive capability allows 15-20A DC load on the VDDQ supply. The VTT termination voltage is an internal sink/ source linear regulator, which during S0 state receives its power from the VDDQ bus. It is capable of sourcing and sinking 2 Amps (max). The current limit on this pin is set to 3 Amps (typical). Output Current and PCB layout The current handling capacity of SC2616 depends upon the amount of heat the PC board can sink from the SC2616 thermal pad. (See mounting instructions). The PC board layout must take into consideration the high current paths, and ground returns for both the VDDQ and VTT supply pins. VTT, LGND, VDDQ, 5VCC and PGND traces must also be routed using wide traces to minimize power loss and heat in these traces, based on the current handling requirements. S3 and S5 States During S3 and S5 sleep states, the operation of the VDDQ and VTT supplies is governed by the internal sequencing logic in strict adherence with motherboard specifications. The timing diagram demonstrates the state of the controller, and each of the VDDQ and VTT supplies during S3 and S5 transitions. When S3 is low, the VDDQ supplies the "Suspend To RAM" current of 650 mA (min) to maintain the information in memory while in standby mode. The VTT termination voltage is not needed during this state, and is thus tri-stated during S3. Once S3 goes high, the VDDQ switcher recovers and takes control of the VDDQ supply voltage. When S5 and S3 are pulled low, all supplies shut down. The SS/EN pin must be pulled low (<0.3V) and high again to restart the SC2616. This can be achieved by cycling the input supplies, 5V and
2003 Semtech Corp.
12V since both supplies have to be higher than their UVLO thresholds for proper start-up. Initial Conditions and Event Sequencing The main switcher will start-up in Asynchronous Mode when the voltage on SS/EN pin is greater than ~0.3V. The SS/EN will go high only after the 5Vcc and 12Vcc are higher than their respective UVLO thresholds. The switcher achieves maximum duty cycle when SS/EN reaches 0.8V. When the SS/EN equals 1.25V, the synchronous FET will also be activated. When the S5 and S3 go high for the first time, the VDDQ is supplied by the switcher, thus removing the burden of charging the output capacitors via the linear regulator. An internal latch guarantees that the supply goes through S0 state for the first time. During a transition from S3 to S0, where the 5V and 12V rails and subsequently the SS/EN pin go high, the internal VDDQ standby supply will remain "on" until SS/EN has reached 1V, at which point only the switcher is supplying VDDQ , andthe internal "power good" indicator goes high. The "Memory" activity should be slaved off the "Power OK" signal from the Silver Box supply, and since the "Power OK" is asserted after all supplies are within close tolerance of their final values, the VDDQ switcher should have been running for some time before the memory is activated. This is true for typical SS/EN capacitor values (10nf to 220nf). Thus during transitions from S3 to S0, the concern that the VDDQ Standby supply may have to provide high currents before the switcher is activated is alleviated. The logic inputs to S3 and S5 pins must be defined before application of power to the SC2616. This can be guaranteed by pulling up the S3 and S5 inputs to 5VStandby. If the chipset that asserts these signals is powered after the SC2616 powers up, and S3 and S5 are not pulled up, erroneous startup and operation can result. Care must be taken not to exceed the maximum voltage/ current specifications on to the interface supplying these signals. The pullup voltage and resistor must be chosen such that when high, the S3 and S5 do not "back drive"
11 www.semtech.com
SC2616
POWER MANAGEMENT Applications Information (Cont.)
the interface chipset (Southbridge, etc.) and the maximum voltage applied to these pins do not exceed the chipsets specifications. A separate lower pullup supply may be necessary to avoid damage to the chipset. "Back Feeding" the Input Supply When in S3 state, VDDQ is supplied by the linear regulator and current can flow back from the VDDQ supply through the body diode of the Top switching MOSFET to the 5V supply of the Silver Box, which is off during the S3 state. This in turn shorts out the VDDQ supply and is not desirable. There are two approaches to avoiding this reverse current flow. One method is to place a MOSFET in series with the top switching MOSFET, but with the source and drain reversed. (see typical application circuit). The MOSFETs should be connected with sources connected to each other, to prevent Gate Source (Vgs) break-down in the even the inductor current flows in the negative direction, which subsequenstly can give rise to the switching (Phase) node voltage flying up to voltages higher than VGS_Breakdown. The connection of the MOSFETs in this manner places the body diodes back to back, thus removing a current path from VDDQ supply back into the input power source. Another way is to use the Instantly available ACPI controllers (such as Semtech SC1549). Such controllers serve to provide a 5V bus to the user, irrespective of the Status of S3 and S5 signals. Thus the 5V supply and the 5V Standby are multiplexed to provide an "always On" 5V to the VDDQ supply. Since the 5V supply is always greater than VDDQ, the back to back MOSFET connection is no longer necessary. Current Limit Current limit is implemented by sensing the VDDQ voltage If it falls to 60% off its nominal voltage, as sensed by the FB pin, the TG and BG pins are latched off and the switcher and the linear converters are shut down. To recover from the current limit condition, either the power rails, 5VCC or 12VCC have to be recycled, or the SS/EN pin must be pulled low and released to restart switcher operation.
2003 Semtech Corp. 12 www.semtech.com
Thermal Shutdown There are three independent Thermal Shutdown protection circuits in the SC2616: the VDDQ linear regulator, the VTT source regulator, and the VTT sink regulator. If any of the three regulators' temperature rises above the threshold, that regulator will turn off independently, until the temperature falls below the thermal shutdown limit.
SC2616
POWER MANAGEMENT Applications Information (Cont.)
Compensation Components Once the filter components have been determined, the compensation components can be calculated. The goal of compensation is to modify the frequency response characteristics of the error amplifier to ensure that the closed loop feedback system has the highest gain and bandwidth possible while maintaining stability. A simplified stability criteria states that the open loop gain of the converter should fall through 0dB at 20dB/ decade at a frequency no higher than 20-25% of the switching frequency. This objective is most simply met by generating asymptotic bode plots of the small signal response of the various sections of the converter. It is convenient to split the converter into two sections, the Error amp and compensation components being one section and the Modulator, output filter and divider being the other. First calculate the DC Filter + Modulator + Divider gain. The DC filter gain is always 0dB, the Modulator gain is 19dB at 5V in and is proportional to Vin, so modulator gain at any input voltage is.
V GMOD = 19 + 20 Log IN 5
Calculate the filter double pole frequency (Fp(lc))
Fp(lc ) = 1 2 LCo
and calculate ESR Zero frequency (Fz(esr))
Fz( esr ) = 1 2 Co Re sr
Choose an open loop crossover frequency (Fco) no higher than 20% of the switching frequency (Fs). The proximity of Fz(esr) to the crossover frequency Fco determines the type of compensation required, if Fz(esr)>Fco/4, use type 3 compensation, otherwise use type 2. Type 1 compensation is not appropriate and is not discussed here. Type 2 Example As an example of type 2 compensation, we will use the Evaluation board schematic. The total Filter+Modulator+Divider DC Gain is:
8.06 5 GFMD = 19 + 20 Log + 20 Log = 13.6dB 5 6.98 + 8.06
This is drawn as the line A-B in Figure 5.
Fp(lc ) = 1 1 = 1.6kHz -6 2 LCo 2 3.3 10 3000 10-6
the divider gain is given by
RB G DIV = 20 Log R +R B A
So the total Filter + Modulator + Divider DC Gain is
RB V G FMD = 19 + 20 Log IN + 20 Log R +R 5 B A
FB SC2616 AND FETS
Vin=5V
MODULATOR
REF
+ EA -
3.3uH OUT 6.98k 3000uF VOUT
SC2610 AND FETS Cs
COMP
REF FB
+ EA -
MODULATOR L OUT Ra VOUT
Cp 22mOhm 8.06k
Rs
COMP Zf Co Zs Zp Resr
Rb
2003 Semtech Corp.
13
www.semtech.com
SC2616
POWER MANAGEMENT Applications Information (Cont.)
This is point B in Figure 5.
Fz( esr ) = 1 = 2.4kHz 2 3000 10 - 6 22 10 - 3
100 80 E
Gain (dB)
This is point C in Figure 5., the line joining B-C slopes at 40dB/decade, the line joining C-D slopes at -20dB/decade. For 600kHz switching frequency, crossover is designed for 100kHz. Since Fz(esr)<A
60
Compensated Error Amp gain F G H Fz1 C Fp1 Total open loop gain
40
20
A Fp(lc)
B
0
Fz(esr) -20 Filter+modulator +divider gain -40 Fco D
-60 100.0E+0
1.0E+3
10.0E+3 Frequency (Hz)
100.0E+3
1.0E+6
Figure 5: Type 2 Error Amplifier Compensation
Rs =
10 20 where A = gain at Fco (in dB) gm
Cs =
1 2 Fz1 Rs
Cp =
1 2 Fp1 Rs
For this example, this results in the following values.
27.5
Rs =
Cs
10 20 = 29.6k 30k 0.8
1 = 0.22nF 6 25 10 3 30 10 3 1 = 14pF (unecessar y due to EA rolloff ) 6 400 10 3 30 10 3
Cp
2003 Semtech Corp.
14
www.semtech.com
SC2616
POWER MANAGEMENT Mounting Considerations
Description The MLP18 is a leadless package whose electrical connections are made by lands on the bottom surface of the component. These lands are soldered directly to the PC board. The MLP has an exposed die attach pad, which enhances the thermal and electrical characteristics enabling high power applications. Power handling capability of the MLP package is typically >2x the power of other common SMT packages, such as the TSSOP and SOIC packages. In order to take full advantage of this feature the exposed pad must be physically connected to the PCB substrate with solder. Thermal Pad Via Design Thermal data for the MLP18 is based on a 4 layer PCB incorporating vias which act as the thermal path to other layers. (Ref: Jedec Specification JESD 51-5). Based on thermal performance, four-layer PCB's with vias are recommended to effectively remove heat from the device. Vias should be 0.3mm diameter on a 1.2mm pitch, and should be plugged to prevent voids being formed between the exposed pad and PCB thermal pad due to solder escaping by capillary action. Plugging can be accomplished by "tenting" the via during the solder mask process. The via solder mask diameter should be 100m larger than the via diameter. Two layer boards have less copper and thus typically require an increase in the PC board area for effective heatsinking. The copper area immdiately surrounding the thermal pad connection must not be interupted by routing traces. Exposed Pad Stencil Design It is good practice to minimize the presence of voids within the exposed pad inter-connection. Total elimination is difficult but the design of the exposed pad stencil is important, a single slotted rectangular pattern is recommended. (If large exposed pads are screened with excessive solder, the device may "float", thus causing a gap between the MLP terminal and the PCB land metalization.) The proposed stencil designs enables outgassing of the solder paste during reflow as well as controlling the finished solder thickness.
2003 Semtech Corp.
15
www.semtech.com
SC2616
POWER MANAGEMENT Outline Drawing - MLP-18
TERMINAL 1 IDENTIFIER
TOP VIEW
TERMINAL 1
BOTTOM VIEW 1 CONTROLLING DIMENSIONS: MILLIMETERS
2003 Semtech Corp.
16
www.semtech.com
SC2616
POWER MANAGEMENT Land Pattern - MLP-18
Contact Information
Semtech Corporation Power Management Products Division 200 Flynn Road, Camarillo, CA 93012 Phone: (805)498-2111 FAX (805)498-3804
2003 Semtech Corp. 17 www.semtech.com

▲Up To Search▲

Price & Availability of SC2616

	To Download SC2616 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .